1. Technical Field
Example embodiments relate to a memory device, and more particularly to a redundancy control circuit for repairing defective memory cells and a memory device including the redundancy control circuit.
2. Description of the Related Art
As the integration degree of a semiconductor memory increases, a capacity of the semiconductor memory is increasing rapidly. Increase of the capacity of the semiconductor memory according to the development of the semiconductor technology represents that the number of memory cells included in a chip increases. As the number of memory cells increases, the number of the defective memory cells may also increase. Since the defective memory cells may cause a critical problem in the semiconductor memory device, redundant memory cells are provided to replace the defective memory cells. The defective memory cells are replaced with the redundant memory cells based on repair addresses stored in fuses. When an address of the defective memory cell is inputted, a normal path is blocked and a redundancy path to the redundant cell is activated according to program state of the fuses.
The fuses are programmed or cut out to store information about the repair address. The number of the programmed fuses may be varied according to bit values of the repair address. As the number of the programmed fuses is increased, the residues remaining around the cut area is increased. Thus, the reliability of a redundancy control circuit including the fuses may be degraded due to the increased residues.